(News) TSMC moves forward with silicon photonics: Broadcom and NVIDIA become first customers

According to a report in Economic Daily News, TSMC has made significant progress in its silicon photonics strategy. The company recently achieved the integration of co-packaged optics (CPO) and advanced semiconductor packaging technology, with sample deliveries expected to begin in early 2025. With this milestone, TSMC will usher in the era of 1.6T optical transmission by the second half of 2025. Industry observers expect Broadcom and NVIDIA to be TSMC’s first customers for these solutions.

The era of silicon photonics could be realized as early as 2025. According to the report, TSMC, in cooperation with Broadcom, successfully prototyped a major CPO technology, microring modulator (MRM), using the 3nm process. This development paves the way for integrating CPO with high performance computing (HPC) or ASIC chips for AI applications, enabling a major leap from electrical to optical signal transmission in computing tasks.

The report also highlights challenges in manufacturing CPO modules. The complex packaging process and low yields suggest that TSMC may outsource some of its optical engine (OE) packaging orders to other advanced packaging providers in the future.

Industry analysts cited in the report note that TSMC’s vision for silicon photonics revolves around integrating CPO modules with advanced packaging technologies such as CoWoS and SoIC. This approach overcomes the speed limitations of traditional copper interconnects. TSMC plans to begin sample deliveries in 2025, with 1.6T products entering mass production in the second half of this year, with shipments expected to expand in 2026.

Economic Daily News further cites industry sources suggesting that NVIDIA plans to adopt CPO technology, followed by the Rubin architecture, starting with the GB300 chip scheduled for release in late 2025. This move aims to address the limitations of the current NVLink 72 interconnect, which connects up to 72 GB200 chips, by improving communication quality and mitigating signal interference and overheating issues in HPC applications.

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